By Luís Macedo, Amílcar Cardoso (auth.), Barry Smyth, Pádraig Cunningham (eds.)
This booklet constitutes the refereed complaints of the 4th eu Workshop on Case-Based Reasoning, EWCBR-98, held in Dublin, eire, in September 1998.
The forty-one revised complete papers offered have been conscientiously chosen and reviewed for inclusion within the court cases. The contributions handle the illustration and association of circumstances in case-bases, the review of case similarity, the effective retrieval of circumstances from huge case-bases, the variation of comparable case options to slot the present challenge, case studying and case-base upkeep, and the appliance of CBR expertise to real-world problems.
Read Online or Download Advances in Case-Based Reasoning: 4th European Workshop, EWCBR-98 Dublin, Ireland, September 23–25, 1998 Proceedings PDF
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Extra info for Advances in Case-Based Reasoning: 4th European Workshop, EWCBR-98 Dublin, Ireland, September 23–25, 1998 Proceedings
16. S. Oaks and H. Wong. Java Threads. O’Reilly, 1999. 17. D. Selman. Java 3D Programming. Manning Publications, 2002. 18. F. Hwang, K. Briggs. Computer Architecture and Parallel Processing. McGrawHill, 1995. 19. I. Englander. The Architecture of Computer Hardware and System Software: An Information Technology Approach. John Filey & Sons, 2000. uk Abstract. In this paper, we show how artiﬁcial evolution can be used to improve the fault-tolerance of electronic circuits. We show that evolution is able to improve the fault tolerance of a digital circuit, given a known fault model.
We evolve the circuits on a 7x7 grid, where the 7th column is the output column. In order to improve the chances of evolving diﬀerent circuits, we allow the algorithm to use a large set of diﬀerent node functions, including and, or, xor, nand, nor. We use uniform crossover and a mutation operator that randomly changes one of the inputs or replaces a node function with a new random one. 3 Computing Error Behaviour The goal of our algorithm is to create individuals that diﬀer in their error patterns.
Table 1. Correct Circuits from 10 runs. 96 The ﬁrst two columns of Table 1 show the circuit identiﬁcation number and the number of active nodes used in the circuit. The number of active nodes alone indicates that the circuits are very diﬀerent from each other. They use between 15 and 26 nodes. The following column reports the sum of the values in the error string of the circuit, it gives the expected number of bit errors for a single, random fault in the circuit. This column shows that the circuits vary strongly in their sensitivity to faults, circuit 6 showing more than 30% more errors than circuits 3 and 4.